Shweta S. Chimurkar, Prof. P. J. Suryawanshi. ANALYSIS OF 16 BIT RISC PROCESSOR USING LOW POWER PIPELINING. JRPS [Internet]. 2018 Jun. 30 [cited 2024 Nov. 6];9(2):14-8. Available from: https://jrps.shodhsagar.com/index.php/j/article/view/1317