Shweta S. Chimurkar, and Prof. P. J. Suryawanshi. “ANALYSIS OF 16 BIT RISC PROCESSOR USING LOW POWER PIPELINING”. International Journal for Research Publication and Seminar 9, no. 2 (June 30, 2018): 14–18. Accessed November 6, 2024. https://jrps.shodhsagar.com/index.php/j/article/view/1317.