Shweta S. Chimurkar and Prof. P. J. Suryawanshi (2018) “ANALYSIS OF 16 BIT RISC PROCESSOR USING LOW POWER PIPELINING”, International Journal for Research Publication and Seminar, 9(2), pp. 14–18. Available at: https://jrps.shodhsagar.com/index.php/j/article/view/1317 (Accessed: 6 November 2024).