SHWETA S. CHIMURKAR; PROF. P. J. SURYAWANSHI. ANALYSIS OF 16 BIT RISC PROCESSOR USING LOW POWER PIPELINING. International Journal for Research Publication and Seminar, [S. l.], v. 9, n. 2, p. 14–18, 2018. Disponível em: https://jrps.shodhsagar.com/index.php/j/article/view/1317. Acesso em: 22 nov. 2024.